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CEA-EDF-INRIA School
2008 Computer Science Summer School
Petascale Computing: from chip to HPC center

June 9-20, 2008 - Centre Port-Royal, Saint-Lambert-des-Bois
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information:

Organizer:

Christophe CALVIN (CEA)

Introduction:

For more than two decades High Performance Computing has been a major tool for scientific simulation. It becomes an essential key for industrial design and for scientific research as well. The race towards more and more performance shows no limit, from Cray machines of the early 80's with just a few Gigaflops, to present time supercomputers reaching more than 100 TFlops. The next goal is the “mythic” PFlops limit, which should be attained by 2010. However, in order to reach such performance, massively parallel computers are used. With computing nodes consisting of multicores, overall performance can be increased either by using more nodes, or by using more cores per node.
One of the questions is: how to reach PFlops? By increasing the number of cores, adding some accelerators, increasing core performance?
Other points are: how to get really good performances from these architectures? How to deal with such large number of computing nodes?

The main objective of this summer school is to address these problems and to acquaint scientific applications developers and architects with the issues of petascale computing.

Audience:

This school is open to engineers, researchers, PhD students, or anyone interested by scientific computing, parallel programming, multicore processors, high-performance compilation, or any of the topics addressed in this school. It is assumed that participants have basic knowledge in computer science.

Prelimary program:

These problems will be addressed during a two week school by:

- Three main lectures and hands-on sessions:

Lecture 1 - Microprocessor architecture
  • Prof. William Jalby (Univ. de Versailles St Quentin - France)
In this course the main trends of microprocessor architecture (vector extensions, multicore, GPU...) will be described, emphasizing the impact of such trends on application tuning.

Lecture 2 - System Software for Peta-Scale Computing
  • Prof. Guang Gao (Univ. of Delaware - USA)
This lecture series will provide an overview of system software of Peta-Scale computer systems including topics in multithreading, virtual machines, memory models, and compilers & runtime technology topics.

Lecture 3 - Programming models and environments
for petascale computing
  • Prof. Marc Snir (Univ. of Illinois at Urbana-Champaign - USA)
The course will provide a methodical introduction to the main parallel programming models that are prevalent today or are likely to be widely available in the near future

Seminars:

Various conferences by international specialists concerning arithmetic precision, I/O for petascale computing, GPU programming, debug of petascale applications, ...

Conférence 1 - Mardi 10/06/08
Prochaine norme virgule flottante, et calculs "exacts" avec une arithmétique approchée
J.M. Muller, Prof. ENS Lyon

Résumé: L'arithmétique virgule flottante a été conçue comme une simple approximation de l'arithmétique réelle. Cependant, comme le comportement de chaque opération est complètement spécifié par une norme (la norme IEEE-754), l'arithmétique virgule flottante peut aussi être vue comme une structure mathématique sur laquelle on peut construire des algorithmes et des preuves. C'est ainsi que l'on peut construire des algorithmes arithmétiques nettement plus rapides et précis que ce que l'on pouvait faire auparavant. On donnera quelques exemples montrant l'intérêt de cette approche. On en profitera également pour donner un aperçu des nouveautés figurant dans la révision de la norme IEEE-754, qui est presque finalisée.

Conférence 2 - Mercredi 11/06/08
Challenges of performance analysis on petascale systems
B. Mohr (FZJ)

Résumé: The number of processor cores available in high-performance computing systems is steadily increasing. A major factor is the current trend to use multi-core and many-core processor chip architectures.  In the latest (Nov 2007) list of the TOP500 supercomputers, 86% of the systems listed have more than 1024 processor cores and the average is about 3300. 
While these promises ever more compute power and memory capacity to tackle today's complex simulation problems, it forces application developers to greatly enhance the scalability of their codes to be able to exploit it. This often requires new algorithms, methods or parallelization schemes to be developed as many well-known and accepted techniques stop working at these large scales. It starts with simple things like opening a file per process to save checkpoint information, or collecting simulation results of the whole program via a gather operation on a single process, or previously unimportant order O(n2)-type operations which quickly dominate the execution. Unfortunately many of these performance problems only show up when executing with very high numbers of processes and cannot be easily diagnosed or predicted from measurements at lower numbers. Detecting and diagnosing these performance and scalability bottlenecks requires sophisticated performance instrumentation, measurement and analysis tools. Simple tools typically scale very well but the information they provide proves to be less and less useful at these high scales.
It is clear that tool developers face exactly the same problems as application developers when enhancing their tools to handle and support highly scalable applications. In this talk we discuss the major limitations of currently used state-of-the-art performance measurement, analysis and visualization methods and tools. We give an overview about experiments, new approaches and first results of performance tool projects which try to overcome these limits.

Conférence 3 - Jeudi 12/06/08 ou jeudi 19/06/08
GPU Programming
Conférencier : INRIA Nancy
Résumé: (à venir)

Conférence 4 - Vendredi 13/06/08
Tutorial on Parallel Debugging with TotalView
Nikolay Piskun (TotalView Technologies)

Résumé : The TotalView Debugger helps scientists and engineers develop, enhance, and maintain software to take advantage of world class HPC systems. Anyone developing HPC software should attend this tutorial to learn how to take advantage of TotalView's parallel debugging features to troubleshoot and gain insight into their own application at scale. The tutorial assumes proficiency with Fortran or C/C++ and familiarity with MPI, OpenMP, and with graphical debuggers. Participants will learn how to apply features like parallel process control, automatic and manual process and thread grouping, subset attach, graphical call tree display, View Across Processes, graphical MPI Message Queue display, parallel expression evaluation, and CLI scripting in their debugging sessions.

Conférence 5 – Lundi 16 juin 2008
Utilisation des ressources / services informatiques : vers un accès simple et transparent ?
M. Daydé F. Desprez, D. Hagimont, A. Hurault, J.M.Pierson

Résumé : Les infrastructures informatiques actuelles offrent de multiples ressources (données, puissance de calcul, stockage,…) et services (logiciels, …). D'un point de vue de l'utilisateur accéder et utiliser ses ressources peut se révéler complexe :

Du point de vue système, le déploiement et l'administration de ces ressources / services suscitent de multiples difficultés (virtualisation, interopérabilité, ordonnancement, description, mise à jour, sécurité…).
Nous aborderons ces problématiques en nous projetant essentiellement dans l'univers des grilles de calcul et en considérant des ressources qui sont souvent des services de calcul (sans exclure les problèmes d'accès aux données).
Nous nous proposons de survoler un certain nombre de ces aspects en partant des mécanismes sous-jacents : sockets, RPC, programmation objet répartie, GridRPC, grid / web services, gestion des services sur la grille, ordonnancement de l'exécution, courtage des services, virtualisation,… en donnant quelques exemples permettant d'illustrer les avancées et limites actuelles en s'appuyant sur les approches existantes aujourd'hui pour faciliter les tâches de l'utilisateur de l'outil informatique à large échelle (Globus, DIET, TUNE, …) :

Conférence 6 - Mardi 17 juin 2008
Le stockage pour les machines de classe "Petaflops".
Jacques-Charles Lafoucrière (CEA/DAM/Dif)

Résumé : Les calculateurs parallèles comportent de plus en plus d'éléments. Leur usage crée des besoins en termes de stockage qui sont aussi en pleine croissance. La conception, l'exploitation et l'utilisation des systèmes de stockage de ces machines augmentent en complexité.
 Nous nous proposons de décrire les technologies actuelles (matériels et logiciels), et leurs évolutions connues ou prévisibles afin d'exposer ce que pourrait être le système de stockage d'un calculateur Petaflopique.
 Enfin nous exposerons les contraintes d'utilisation et d'exploitation de tels systèmes et esquisserons les voies envisagées pour y répondre.

Week 1 (June 9- June 13, 2008)

Timetable

 

 Monday
June 9, 2008		 Tuesday
June 10, 2008		 Wednesday
June 11, 2008		 Thursday
June 12, 2008		 Friday
June 13, 2008
9:00-10:00 Welcome L1 L1 L1 L1
10:00-10:15 L1
10:00-11:00		 Coffee break Coffee break Coffee break Coffee break
10:15-11:15 L2 L2 L3 L3
Coffee break
11:00-11 15
11:15-11:30 L2
11:15-12:15		 Coffee break Coffee break Coffee break Coffee break
11:30-12:30 L2 L2 L2 L2
Coffee break
12:15-12:30
12:30-14:00 Lunch Lunch Lunch Lunch Lunch
14:00-15:30 1H1 2H2 1H1 2H2 1H1 2H2 1H1 2H3 1H3 2H1
15:30-15:45 Coffee break Coffee break Coffee break Coffee break Coffee break
15:45-17:15 1H2 2H1 1H2 2H1 1H2 2H1 1H3 2H2 1H2 2H3
17:15-17:45 Coffee break Coffee break Coffee break Coffee break Coffee break
17:45-18:45   C1 C2 C3 C4

 

Week 2 (June 16- 20, 2008)

Timetable
  Monday
June 16, 2008		 Tuesday
June 17, 2008		 Wednesday
June 18, 2008		 Thursday
June 19, 2008		 Friday
June 20, 2008
9:00-10:00 L1 L1 L1 L1 L3
10:00-10:15 Coffee break Coffee break Coffee break Coffee break Coffee break
10:15-11:15 L3 L3 L3 L3 L3
11:15-11:30 Coffee break Coffee break Coffee break Coffee break Coffee break
11:30-12 :30 L2 L2 L2 L3 L3
12:30-14:00 Lunch Lunch Lunch Lunch Lunch
14:00-15:30 1H1 2H3 1H3 2H2 1H1 2H3 1H3 2H1 1H3 2H1
15:30-15:45 Coffee break Coffee break Coffee break Coffee break Coffee break

15:45-17:15

 1H3 2H2 1H2 2H3 Workshop 1H2 2H3 Wrap-up
17:15-17:45 Coffee break Coffee break Coffee break
17:15-17:30		 Coffee break Coffee break
17:45-18:45 C5 C6 Workshop

 

Total Lectures Total Hands-on
L1 9 Lecture 1 1H1 9 Group 1 Hands-on 1
L2 10

 Lecture 2 1H2 9 Group 1 Hands-on 2
L3 10 Lecture 3 1H3 9 Group 1 Hands-on 3
    2H1 9 Group 2 Hands-on 1
2H2 9 Group 2 Hands-on 2
2H3 9 Group 2 Hands-on 3


C1 Prochaine norme virgule flottante, et calculs "exacts" avec une arithmétique approchée J.M. Muller
C2 Challenges of performance analysis on petascale systems B. Mohr
C3 Experiences on GPGPU  
C4 Tutorial on Parallel Debugging with TotalView N. Piskun
C5 Utilisation des ressources / services informatiques : vers un accès simple et transparent ? M. Daydé
C6 Le stockage pour les machines de classe "Petaflops". J.C. Lafoucrière

 

Contacts:

http://www.inria.fr/ecoles-cea-edf-inria
 Program: Christophe CALVIN
Organisation: Régis VIZET

Accomodation:

The school takes place near Paris in the Seminar Center Port-Royal
The seminar center provides a peaceful and comfortable environment designed to facilitate learning and interaction between participants.

 

 logo SMAI We gratefully acknowledge the assistance of SMAI in promoting these schools.

CEA-EDF-INRIA General information: Petascale Computing: from chip to HPC center

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