Computational Engineering

Today, no object is manufactured without a digital prototype having first been created. INRIA desires to contribute to developing computational engineering, from modeling the object, its functions and desired behavior, to the architectural design, virtual prototyping and synthesizing its embedded software. This development must be integrated. The design and modeling will integrate multi-physical models with dynamic, safe and secure behavior. The multi-level simulation will enable the properties to be predicted, as well as the initial stages of virtual prototyping.

Embedded system architecture, for example, depends on the communication and computational model, the combined specifications and hardware/software components, the elements ensuring fault tolerance, the operating systems and the associated executables. Significant research problems in programming and code compilation are caused by the new multi-core processors.

In relation to software synthesis, the automated models and digital simulation have had to change to embedded code. Recurrent and other more specific problems arise, such as the compilation techniques adapted for multi-core architectures, response time or power consumption constraints, algorithm synthesis for certified source code, or the static nature of many embedded codes. Validation and verification of operational properties, particularly dynamic behavior, involve test synthesis – a problem relating to very open automation. Software properties are verified through model checking, static analysis and abstract interpretation. Compilers and certified machines must be developed for this purpose.

« INRIA aims to contribute to developing computational engineering, from modeling the object, its functions and desired behavior, to the architectural design, virtual prototyping and synthesizing its embedded software. »

In relation to non-operational properties, especially dependability and security, critical problems often arise, giving INRIA the opportunity to apply their expertise in formal specification methods and engineering founded on proof. The Institute is especially interested in modeling and verifying the architectures when failures and attacks by engineering driven by models and model transformations are present. It will also study software verification techniques for embedded critical functions on hardware circuits.

Finally, the supervision and diagnosis functions are designed based on safety and reliability properties. These elements will be developed with procedures for supervising the overall operating condition of the artifact, identifying anomalies, diagnosing their sources, and isolating faulty hardware components. The supervision and diagnosis functions will need to be modeled from the time of their initial design. The system will also have to be able to be reconfigured after a diagnosed failure.